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6.5 HIT technology cells

A photovoltaic cell where a thin layer of crystalline n-type silicon is sandwiched between two thin layers of amorphous silicon is called a HIT (Heterojunction with Intrinsic Thin Layer). It is one of the solutions resulting from work aimed at achieving higher efficiency commercial cells. This cell combines both crystalline and amorphous features of silicon cell design in a single structure. The structure of the HIT photovoltaic cell is shown in Fig. 1.

Schematic of a cell made with HIT technology. Own elaboration.
Figure 1: Schematic of a cell made with HIT technology. Own elaboration.


An inner thin layer of n-type crystalline silicon is sandwiched between two thin layers of amorphous silicon. This inner layer is first texturized ( Fig. 2 ), and then covered with the corresponding amorphous silicon layers. The front layer of n-type crystalline silicon is covered with up to 10 nm thick amorphous a-Si followed by p-type amorphous a-Si, while the back layer is covered with up to 10 nm thick amorphous a-Si and n-type amorphous a-Si. Charge-collecting electrodes (screen contacts) are applied to the top on both sides. Very thin internal a-Si layers, occurring between the a-Si and the crystalline c-Si substrate, are designed to improve the performance of the p-n junction. Transparent conducting oxide (TCO) layers are formed on the two doped layers, and conductive paths are then printed. Backside metallization is also combed to reduce thermal and mechanical stresses, making the cell symmetrical and allowing it to be used as a double-sided cell.

Photovoltaic cell made in HIT technology. Own elaboration.
Figure 2: Photovoltaic cell made in HIT technology. Own elaboration.


The cells are designed to reduce the footprint and achieve higher efficiency compared to the standard crystal cells ( Fig. 3 ), that are available on the market. The HIT cells were demonstrated by Sanyo Electric Solar Division, which manufactures this type of cell in classic and so-called honeycomb shapes to better utilize the relatively expensive monocrystals and the active area of the photovoltaic panel.

The process of making a cell in HIT technology. Own elaboration.
Figure 3: The process of making a cell in HIT technology. Own elaboration.


Cells of this type are not sensitive to higher temperatures, which means that their efficiency at higher temperatures does not change much [1]. This HIT technology produces cells that exhibit high efficiency at \( 75_{}^{o}\textrm{C} \). This technology provides excellent surface passivation at relatively low process temperatures (below \( 200_{}^{o}\textrm{C} \)), allowing for reduced degradation over the lifetime of the photovoltaic cell.

Photovoltaic panel made in HIT technology. Own elaboration.
Figure 4: Photovoltaic panel made in HIT technology. Own elaboration.


Panasonic announced that it has developed a cell with an efficiency of \( 25.6\% \) ( Fig. 4 ).
Hydrogenated amorphous silicon, prepared by plasma enhanced chemical vapor deposition (PECVD), has a higher energy gap than crystalline material. Therefore, this material forms a heterojunction with a wide bandgap, providing very effective low recombination of the generated charges. The uppermost, thin, heavily-doped, p-type amorphous layer forms a junction with the n-type crystalline wafer. The intervention of the very thin internal amorphous silicon layer plays an important role in achieving high performance [2], [3].

Since the conductivity of even heavily doped amorphous silicon is quite low due to low carrier mobility, transparent conducting oxides are needed on both the front and back surfaces of the cell to allow carrier transport to the metal screen contacts on both surfaces. Since the back contact can be transparent, the cell can respond to light from both sides. This can improve the output power in installations where the back of the panel is exposed to ambient scattered light [4].
There are several other interesting features of this technology. The quality of the surface passivation obtained from the amorphous silicon layer yields record cell output voltages, which were confirmed by H. Sukatai [2], [3].

These form the basis of the cell's high energy conversion efficiency. In addition, this technology uses n-type wafers doped with phosphorus, which overcomes problems with boron and oxygen defects. Photovoltaic cell processing temperatures are typical of amorphous silicon cells and much lower than those of crystalline silicon cells.
The main technical weakness of this technology is that the transparent conductive oxide layers are neither perfectly transparent nor perfectly conductive. This forces a trade-off between light absorption in these layers and loss of lateral resistance. Light absorbed in the heavily doped amorphous layers in these cells reduces the power produced by the cell.
Individual cells achieved confirmed efficiencies up to \( 24.7\% \) [5].

Bibliography

1. Panasonic: HIT Photovoltaic module, dostęp:06.07.2020
2. H. Sakata, T. Nakai, T. Baba, M. Taguchi, S. Tsuge, K. Uchihashi, S. Kiyama: 20.7% highest efficiency large area (100.5 cm2) HIT/sup TM/ cell, Conference Record of the Twenty-Eighth IEEE Photovoltaic Specialists Conference – 2000 (Cat. No.00CH37036), Anchorage, AK, USA, 15-22 Sept. 2000.
3. M. A. Green: Silicon Solar Cells : Advanced Principles & Practice, Centre for Photovoltaic Devices and Systems – University of New South Wales, Sydney 1995.
4. Y. K. Chieng, M. A.Green: Computer simulation of enhanced output from bifacial photovoltaic modules, Progress in Photovoltaics 1993, Vol. 1, Iss. 4, pp. 293-299, dostęp:14.12.2020
5. M. A. Green, K. Emery, Y. Hishikawa, W. Warta, E. D. Dunlop: Solar Cell Efficiency Tables (Version 42), Progress in Photovoltaics 2013, Vol. 21, Iss. 5, pp. 827-837, dostęp:14.12.2020

Ostatnio zmieniona Niedziela 09 z Styczeń, 2022 12:09:51 UTC Autor: Konstanty Marszałek, Katarzyna Dyndał, Gabriela Lewińska, Jerzy Sanetra
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